I2S_RX_CHANNELS=Val_0x0, I2S_TX_CHANNELS=Val_0x0
Module Configuration Register 1
| APB_DATA_WIDTH | These bits specify the APB data width. 2 (Val_0x2): APB data width of 32 bits |
| I2S_FIFO_DEPTH_GLOBAL | These bits specify the FIFO depth for TX and RX channels. 3 (Val_0x3): FIFO depth is equals to 16 for TX and RX channels |
| I2S_MODE_EN | This bit specifies whether the Master mode is enabled or not. 1 (Val_0x1): Master mode is enabled |
| I2S_TRANSMITTER_BLOCK | This bit specifies whether the transmitter block is enabled or not. 1 (Val_0x1): Transmitter block is enabled |
| I2S_RECEIVER_BLOCK | This bit specifies whether the receiver block is enabled or not. 1 (Val_0x1): Receiver block is enabled |
| I2S_RX_CHANNELS | These bits specify the number of RX channels. 0 (Val_0x0): 1 x Receive channel |
| I2S_TX_CHANNELS | These bits specify the number of TX channels. 0 (Val_0x0): 1 x Transmit channel |
| I2S_TX_WORDSIZE_0 | These bits specify the TX resolution for WORDSIZE_0. 4 (Val_0x4): 32-bit Resolution |
| I2S_TX_WORDSIZE_1 | These bits specify the TX resolution for WORDSIZE_1. 1 (Val_0x1): 16-bit Resolution |
| I2S_TX_WORDSIZE_2 | These bits specify the TX resolution for WORDSIZE_2. 1 (Val_0x1): 16-bit Resolution |
| I2S_TX_WORDSIZE_3 | These bits specify the TX resolution for WORDSIZE_3. 1 (Val_0x1): 16-bit Resolution |